Moore's Law and Scaling

In 1965, an engineer named Gordon Moore made an observation that would end up shaping the entire modern world: the number of components that could be economically packed onto a single chip was doubling at a remarkably steady pace. That observation, later dubbed “Moore’s Law,” turned into both a prediction and — because the whole industry believed in it and organized itself around it — a self-fulfilling roadmap that drove fifty-plus years of relentless progress in computing.

What Gordon Moore actually observed

Gordon Moore, later a co-founder of Intel, was working at Fairchild Semiconductor when he wrote a 1965 article noting that the number of transistors that could be fit onto an integrated circuit, at the lowest cost per component, had been doubling roughly every year. In 1975, he revised the pace to roughly every two years, which is the version most commonly cited today. It’s worth being precise here: Moore’s Law was never a law of physics. It was an economic and engineering observation — a trend line based on watching how fast the industry was actually improving — that the industry then worked hard to keep true.

The math behind exponential doubling

The doubling pattern Moore observed can be written as a simple exponential growth formula:

Here, $N(t)$ is the transistor count at time $t$, $N_0$ is the starting transistor count (at time zero), $t$ is the elapsed time, and $T$ is the doubling period — historically about 2 years for transistor counts. Plug in a few numbers and the effect becomes obvious: starting from roughly 2,300 transistors on Intel’s first commercial microprocessor (the 4004, in 1971) and doubling every two years, the math alone predicts tens of billions of transistors by the 2020s — which is roughly what today’s most advanced processors actually contain.

    xychart-beta
    title "Transistor Count Per Chip Over Time (illustrative)"
    x-axis [1971, 1985, 1995, 2005, 2015, 2025]
    y-axis "Transistors" 0 --> 50000000000
    line [2300, 275000, 5500000, 291000000, 5000000000, 50000000000]
  

Notice how the curve looks almost flat for the first few decades and then appears to shoot straight up — that’s the visual signature of exponential growth. The transistor count was doubling just as reliably in 1975 as it was in 2015; it just takes a while for repeated doubling to produce numbers large enough to see on a normal chart.

Why scaling gets harder, not easier

For decades, “doubling transistor count” mostly meant “shrinking the transistor,” since a smaller transistor takes less space, letting more of them fit in the same chip area at the same cost. But shrinking transistors runs into real physical limits, and those limits get more severe every generation:

• Atoms are not infinitely divisible. Transistor features are now measured in single-digit nanometers — a silicon atom itself is roughly 0.2 nanometers across, so there simply isn’t much room left to shrink into before you’re working with only a handful of atoms.
• Quantum effects start interfering. At small enough scales, electrons can “tunnel” straight through barriers that used to reliably block them, causing current to leak even when a transistor is supposed to be off. This is one reason the industry moved to 3D transistor structures like FinFETs and eventually gate-all-around transistors — both designed specifically to fight this leakage.
• Manufacturing tolerances shrink along with the features. Patterning smaller shapes reliably, across an entire wafer, billions of times, requires increasingly extreme tools — see EUV Lithography for what it now takes just to print the pattern.
• Cost per new fab keeps climbing. Building a factory capable of the newest process node now costs tens of billions of dollars, meaning fewer and fewer companies can afford to stay at the cutting edge.

Is Moore’s Law dead?

This gets debated constantly, and the honest answer is nuanced. The original pace — doubling every two years purely from transistor shrinking — has clearly slowed since roughly the 2010s; leading-edge node transitions now take longer and cost more than they used to. But transistor density keeps increasing overall, just through a wider combination of techniques: new transistor geometries, new materials, denser 3D packaging, and architectural cleverness. Whether you call that “Moore’s Law continuing in spirit” or “Moore’s Law ending and something else taking over” is partly a matter of definition — but the underlying economic pressure Moore identified, to keep delivering more computing power per dollar, hasn’t gone away at all.

Key takeaways

• Moore’s Law is Gordon Moore’s 1965/1975 observation that transistor counts on a chip doubled roughly every two years — an economic and engineering trend, not a law of physics.
• The growth pattern follows $N(t) = N_0 \cdot 2^{t/T}$, exponential growth that compounds dramatically over decades.
• Continued scaling is getting physically harder: quantum tunneling, atomic-scale feature sizes, and skyrocketing fab costs are all real limits.
• New transistor structures (FinFET, gate-all-around), extreme manufacturing tools (EUV), and new packaging approaches (chiplets) are how the industry keeps pushing density gains even as pure shrinking slows.
• Whether “Moore’s Law” is alive or dead depends on definition — the pace of pure transistor shrinking has slowed, but total computing density keeps climbing through other means.