What Does "7nm" Actually Mean?

You’ve probably seen chips advertised as “7nm,” “5nm,” or “3nm,” with the implication that smaller numbers mean better, more advanced chips. That part is roughly true — but if you assumed “5nm” meant some physical feature on the chip is literally 5 nanometers across, you’d be wrong, and you’d be in good company. Process node names stopped being direct physical measurements years ago. They’re now closer to a marketing generation label, and understanding why is key to understanding how chipmakers actually compete today.

Where the naming convention came from

In the early decades of chipmaking, process node names really did track a physical dimension: specifically, the minimum length of a transistor’s gate — the sliver of material that controls whether current flows through the channel beneath it (see The MOSFET for what a gate does). When the industry said “250nm process” or “90nm process,” they meant the gate length was approximately that many nanometers. Shrinking the gate length was, at the time, the single biggest lever for making transistors smaller, faster, and more numerous — so it made sense as the headline number.

🧩 Think of it like… a clothing brand that used to size shirts by exact chest measurement in centimeters, but over the decades kept the label numbers shrinking for marketing appeal even as the actual measurement method changed completely. A "size 40" shirt today isn't cut the same way a "size 40" was cut fifty years ago — the number survived, but what it corresponds to physically did not. Chip node names are the same: the label persisted long after it stopped mapping to one specific measurement.

Why the number and reality decoupled

Starting around the 28nm–14nm generations, two things happened that broke the old naming logic:

Gate length stopped shrinking at the same pace as everything else. Other dimensions — like the spacing between adjacent transistor fins, or the pitch of the metal wires connecting them — kept shrinking, but gate length itself hit practical limits sooner. Continuing to name the node after gate length would have made the marketing numbers stop improving, even though real transistor density kept going up.
Transistor structure changed fundamentally. The move to 3D transistor shapes like FinFETs and later gate-all-around transistors means there is no longer one single flat dimension that “the gate length” even simply refers to — the geometry is three-dimensional, with multiple relevant measurements (fin height, fin width, fin pitch, gate wraparound) all contributing to performance.

Once gate length stopped being the honest bottleneck number, foundries kept naming nodes with shrinking figures — “10nm,” “7nm,” “5nm,” “3nm” — largely to signal generational progress relative to their own roadmap and to competitors, not to claim a literal 7-nanometer or 5-nanometer feature exists anywhere on the chip.

Different foundries’ node names aren’t even directly comparable to each other. One company’s “7nm” and another company’s “7nm” can have meaningfully different actual transistor density — the names describe a marketing generation within each company’s own roadmap, not a shared, standardized unit of measurement across the industry.

What’s actually shrinking, then?

Even though the headline number no longer measures gate length, real physical shrinking absolutely is still happening — it’s just measured differently. The metrics that matter more today include:

Fin pitch — the spacing between adjacent transistor fins in a FinFET or GAA design; tighter pitch means more transistors fit in the same area.
Metal pitch — the spacing between adjacent wires in the interconnect layers (see Metallization and Interconnects); this is often the harder constraint to shrink, since wires also need to carry current without excessive resistance.
Contacted poly pitch (CPP) — roughly, the minimum distance between the centers of two adjacent transistor gates, which is a strong proxy for how tightly transistors can be packed.

These dimensions, combined, determine how many transistors can actually fit into a given chip area — which is the thing engineers and customers actually care about.

The better metric: transistor density

Because the node name itself is no longer trustworthy as a physical measurement, industry analysts increasingly rely on transistor density — typically expressed as millions of transistors per square millimeter (MTr/mm²) — as the metric that actually reflects manufacturing progress. Transistor density accounts for the real geometry of a process: fin pitch, metal pitch, cell height, and library design all factor into it, rather than a single label chosen for marketing purposes.

\text{Density} \approx \frac{\text{Transistors}}{\text{Area (mm}^2\text{)}}

Here, density is simply the total number of transistors a process can pack into one square millimeter of silicon. Two processes can carry very different marketing names — say, one company’s “7nm” versus another’s “5nm” — while having comparable real transistor density, because the names were never standardized to begin with. Comparing density numbers (when foundries publish them) gives a far more apples-to-apples comparison than comparing node names alone.

Why this matters to you

Understanding that “7nm” is a name, not a ruler measurement, helps make sense of a lot of industry news: why node names sometimes seem to “skip ahead” faster than physics should allow, why comparing two companies’ identically-named nodes can be misleading, and why the real engineering story — covered in pages like Moore’s Law and Scaling and EUV Lithography — is more about sustained density gains through multiple techniques than about hitting one exact number.

Key takeaways

Process node names (“7nm,” “5nm,” “3nm”) originally tracked transistor gate length directly, but stopped doing so around the 28nm–14nm era.
The names persisted as marketing/generational labels even after the underlying physical measurement they once represented became outdated.
Real shrinking still happens — it now shows up in metrics like fin pitch, metal pitch, and contacted poly pitch, not in one single gate-length number.
Transistor density (transistors per square millimeter) is a more honest, comparable measure of manufacturing progress than node names.
Node names are not standardized across companies — one foundry’s “5nm” isn’t necessarily equivalent to another’s.

Moore's Law and Scaling