Glossary

A quick-reference list of key terms used across this site, sorted alphabetically — use it to jump your memory on a word without re-reading a whole page.

• 2.5D/3D Packaging — Advanced packaging that stacks multiple chip dies vertically or places them side-by-side on a shared interposer, instead of using just one flat die, to pack more performance into less space.
• AND gate — A logic gate whose output is 1 only when all of its inputs are 1.
• ASIC (Application-Specific Integrated Circuit) — A chip custom-designed to do one specific job extremely efficiently, rather than general-purpose computing.
• Band gap — The energy gap between a material’s valence band and conduction band; its size determines whether a material behaves as a conductor, insulator, or semiconductor.
• Binary — A number system using only two digits (0 and 1), matching the two-state (on/off) nature of electronic switches.
• Bipolar Junction Transistor (BJT) — An early transistor type controlled by current (rather than voltage) flowing into its base terminal.
• Bit — The smallest unit of digital information, either a 0 or a 1.
• Byte — A group of 8 bits, commonly used to represent one character or small number.
• Chiplet — A small, self-contained piece of a larger chip design, manufactured separately and then combined with other chiplets in one package.
• Clock (clock signal) — A repeating electrical pulse that synchronizes when digital circuits, like flip-flops, update their state.
• CMOS (Complementary Metal-Oxide-Semiconductor) — The dominant chip design style that pairs N-type and P-type MOSFETs so a circuit draws almost no power while idle.
• CPU (Central Processing Unit) — A general-purpose processor built to execute a wide variety of instructions.
• CVD (Chemical Vapor Deposition) — A manufacturing process that grows a thin solid film on a wafer by reacting gases at its surface.
• Czochralski Process — The method used to grow a single, large, defect-free cylindrical crystal of silicon (an ingot) from molten silicon.
• Damascene Process — A technique for building interconnect wiring by etching trenches into an insulator and filling them with metal, rather than etching the metal itself.
• Deposition — Any manufacturing step that adds a thin layer of material onto a wafer’s surface.
• Die — A single, individual rectangular chip cut from a larger wafer.
• Dicing — The process of cutting a finished wafer into its individual dies.
• Diode — A basic semiconductor device (built from a PN junction) that lets current flow in one direction only.
• Doping — Intentionally adding tiny amounts of other elements to silicon to change how well it conducts electricity.
• DRAM (Dynamic Random-Access Memory) — Fast memory that stores each bit as a charge on a tiny capacitor, but loses its data without power and needs to be continuously refreshed.
• EDA (Electronic Design Automation) — Software used to design, simulate, and verify chips too complex to design by hand.
• Etching — A manufacturing process that removes material from a wafer in precisely patterned areas.
• EUV Lithography (Extreme Ultraviolet Lithography) — A lithography technique using very short-wavelength light to pattern the smallest, most advanced chip features.
• Fabless — A business model where a company designs chips but outsources manufacturing to a foundry.
• FinFET — A 3D transistor design where the channel stands up as a fin, letting the gate wrap around three sides for better control.
• Flip-Chip — A packaging method where a die is mounted upside down, connecting directly to the package through solder bumps rather than wires.
• Flip-Flop — A basic digital memory circuit that stores a single bit and updates it on a clock signal.
• Foundry — A company that manufactures chips designed by other companies, typically without designing its own products.
• FPGA (Field-Programmable Gate Array) — A chip whose internal logic can be reconfigured after manufacturing, rather than being fixed like an ASIC.
• GAA (Gate-All-Around) — A transistor design that surrounds the channel with the gate on all sides, improving on FinFET’s control as transistors shrink further.
• Gate, Source, and Drain — The three main terminals of a MOSFET: the gate controls the switch, and current flows between the source and drain when it’s on.
• GDSII — The standard file format used to describe a chip’s finished physical layout, handed off from designer to foundry.
• GPU (Graphics Processing Unit) — A processor built with many simple cores that perform the same operation on lots of data in parallel, used for graphics and AI workloads.
• IDM (Integrated Device Manufacturer) — A company that both designs and manufactures its own chips.
• Ingot — The large cylindrical crystal of pure silicon grown before being sliced into wafers.
• Interconnect — The layers of metal wiring on a chip that connect transistors together into functioning circuits.
• Ion Implantation — A doping method that fires ionized dopant atoms directly into a wafer using an electric field.
• Logic Gate — A basic circuit that performs one logical operation (like AND or OR) on binary inputs to produce a binary output.
• Mask (Reticle) — A patterned plate used in photolithography to project a circuit pattern onto a wafer’s photoresist.
• Moore’s Law — The historical observation that the number of transistors on a chip roughly doubles every couple of years.
• MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) — The dominant modern transistor type, switched on and off by a voltage applied to its gate.
• NAND Flash — Non-volatile memory that retains data without power, used for long-term storage like SSDs and phone storage.
• NAND gate — A logic gate that outputs the opposite of AND: 0 only when all inputs are 1.
• NOR gate — A logic gate that outputs the opposite of OR: 1 only when all inputs are 0.
• NOT gate — A logic gate that inverts its single input (0 becomes 1, 1 becomes 0).
• N-type semiconductor — Silicon doped with atoms that contribute extra free electrons as charge carriers.
• OR gate — A logic gate whose output is 1 if any of its inputs are 1.
• Packaging — The process of enclosing a die in a protective case with electrical connections to the outside world.
• Photolithography — The process of using light to transfer a circuit pattern onto a photoresist-coated wafer.
• Photoresist — A light-sensitive chemical coating on a wafer that hardens or dissolves where exposed to light during lithography.
• Place and Route — The chip design step that decides where each logic cell physically sits and how the wires between them are routed.
• PN Junction — The boundary between N-type and P-type silicon, the basic building block of diodes and transistors.
• Process Node — A label (like “7nm”) historically tied to transistor feature size, now used more as a generational marketing name for a manufacturing generation.
• P-type semiconductor — Silicon doped with atoms that create extra “holes” (missing electrons) as charge carriers.
• PVD (Physical Vapor Deposition) — A deposition process that physically transfers material onto a wafer, for example by vaporizing a solid source material.
• RTL (Register-Transfer Level) — A description of a chip’s logic written in terms of registers and the operations that move data between them, the starting point of chip design.
• Semiconductor — A material, most commonly silicon, whose electrical conductivity sits between a conductor and an insulator and can be precisely controlled.
• Silicon — The abundant element that forms the base material for nearly all modern chips.
• SRAM (Static Random-Access Memory) — Fast memory built from flip-flops that holds its data as long as power is supplied, without needing refreshing.
• Synthesis — The design step that converts RTL code into a netlist of actual logic gates.
• Threshold Voltage — The minimum gate voltage needed to turn a MOSFET on.
• Transistor — A semiconductor device that acts as an electrically controlled switch or amplifier, the basic building block of all chips.
• TSV (Through-Silicon Via) — A vertical electrical connection that passes directly through a silicon die, used to stack dies in 3D packaging.
• Verilog/VHDL — The two dominant hardware description languages used to write RTL chip designs.
• Wafer — A thin, round slice of a silicon ingot on which chips are manufactured.
• Wire Bonding — A packaging technique that connects a die to its package using extremely thin wires.
• XOR gate — A logic gate whose output is 1 only when its inputs differ from each other.
• Yield — The percentage of dies on a wafer that come out fully functional after manufacturing.