Etching and Deposition

Once photolithography has printed a pattern in resist, something physical has to actually happen to the wafer underneath — material has to either be removed or added. Every structure on a chip, from a transistor’s gate to the trench that will later hold a copper wire, is built from just two fundamental moves repeated over and over: etching (cutting material away) and deposition (building material up). This page covers both.

Two opposite moves, one goal: shaping layers

🧩 Think of it like… sculpting versus 3D printing. Etching is a sculptor with a chisel, working from a solid block and carving away everything that isn't part of the final shape. Deposition is a 3D printer, building a shape up from nothing by laying down material layer by layer. A chip is made by switching between these two approaches dozens of times, using the resist pattern from photolithography as the guide for exactly where each move should happen.

Etching: taking material away

Etching removes material from areas left exposed by the patterned photoresist (or by a hard mask made from a previously deposited layer). There are two broad families:

Wet etching uses liquid chemicals that dissolve the target material through a chemical reaction. It’s simple and cheap, but it etches roughly equally in all directions (isotropic), which undercuts material sideways beneath the resist edge — fine for older, larger features, but too imprecise for modern nanometer-scale patterns.
Dry etching (plasma etching) uses a chemically reactive gas turned into an ionized plasma inside a vacuum chamber. Electric fields accelerate ions to strike the wafer nearly straight down, combining chemical reaction with physical bombardment. This produces highly anisotropic etching — it cuts almost straight down and barely sideways — which is essential for the tall, narrow, precisely-shaped features on modern chips.

The tradeoff is control versus cost and complexity: wet etch is cheap and high-throughput but geometrically sloppy; dry etch is expensive and slow but can carve nearly vertical walls with nanometer precision.

Engineers quantify how “straight-down” an etch is with an anisotropy factor:

A = 1 - \frac{R_{\text{lateral}}}{R_{\text{vertical}}}

Here $R_{\text{lateral}}$ is how fast the etch eats sideways under the mask, and $R_{\text{vertical}}$ is how fast it eats straight down. Purely isotropic wet etching has $R_{\text{lateral}} \approx R_{\text{vertical}}$ , so $A \approx 0$ ; a perfectly anisotropic dry etch has almost no sideways etching, so $A$ approaches 1. Modern nanometer-scale features need $A$ very close to 1, which is exactly why plasma etching dominates leading-edge fabrication.

Deposition: building material up

Deposition lays down a new thin film across the wafer — sometimes everywhere, sometimes selectively. The two dominant techniques:

Chemical Vapor Deposition (CVD) — gaseous chemical precursors are introduced into a chamber, where they react (often with heat or plasma assistance) directly on the wafer’s surface, leaving behind a solid film and releasing byproduct gases that get pumped away. CVD is good at coating even complex, uneven surfaces evenly (good “step coverage”), and is used heavily for insulating layers like silicon dioxide and silicon nitride.
Physical Vapor Deposition (PVD) — a solid source material (often a metal) is physically knocked loose — commonly by bombarding it with ions in a process called sputtering — and the dislodged atoms travel through vacuum and condense onto the wafer. PVD is a purely physical, line-of-sight process, often used for metal seed layers and certain barrier films.

Both families have many specialized variants (plasma-enhanced CVD, atomic layer deposition for atom-by-atom precision, evaporation, and more), but the core idea in each case is the same: add a controlled, thin, uniform layer of a specific material across the wafer.

A wafer cross-section during processing

Dry (plasma) etchsilicon wafer

plasma ions ↓narrow, vertical trench(anisotropic — straight walls)

CVD / PVD depositionsilicon wafer

vapor / sputtered atomsnew film (orange) coatsexisting topography

Why the cycle repeats

A single chip layer often goes through: lithography (pattern resist) → etch (transfer pattern into an underlying film, or into the silicon itself) → strip resist → deposit (fill the etched features or add the next film) → possibly polish flat → repeat. This pattern — Photolithography, then a shaping step, then on to the next layer — is why chip fabrication takes so many process steps, as introduced in From Sand to Chip. Later, when metal wiring layers are built, this etch/deposit cycle takes on a specific, famous form called the damascene process, covered in Metallization and Interconnects.

Deposited films frequently end up with uneven, bumpy surfaces after several layers stack up. A process called Chemical-Mechanical Planarization (CMP) — essentially a precision polishing step using an abrasive slurry — flattens the wafer back to a mirror finish before the next lithography step, since lithography needs a flat surface to stay in focus.

Key takeaways

Etching removes material (wet etch: cheap but etches sideways too; dry/plasma etch: precise, nearly vertical cuts).
Deposition adds material (CVD: chemical reaction forms a film on the surface; PVD/sputtering: physically knocked-loose atoms condense onto the wafer).
These two opposite operations, guided by the resist pattern from photolithography, are how every structure on a chip is physically shaped.
The lithography → etch/deposit → planarize cycle repeats for essentially every layer of a chip, which is a major reason chip fabrication involves so many steps.

Photolithography Ion Implantation and Doping